PROBLEM 054 · Medium · Slew rate
Speed Limit
Slew rate of a five-transistor OTA
The problem
Build a five-transistor OTA: an NMOS pair on a tail Current source with a PMOS mirror load (the diode on the “inp” side), output “out”. The test bench drives “inp” and “inn” (do not place sources). For a large step the whole tail current goes into one side, and the mirror delivers it to the output: the output ramps at I_tail/C_L, the slew rate, whatever the small-signal bandwidth.
Slew rate is a large-signal limit that small-signal analysis misses: an amplifier with a 100 MHz bandwidth can still be unable to follow a 1 V, 10 MHz sinewave. It is set by the tail current and the load capacitance only. Choose the tail current for a slew rate of at least 40 V/µs into the test bench’s 2 pF, while keeping the power under 250 µW.
The test bench
- Supply: VDD = 1.8 V.
- The test bench holds “inn” at 0.9 V, steps “inp” from 0.9 V to 1.4 V at 1 ns, and hangs a 2 pF load capacitor on “out”. It measures the steepest slope of “out” (averaged over 0.5 ns) after the step.
Numbers to hit
- Slew rate at least 40 V/µs
- Power at most 250 µW
Design it yourself
Draw the circuit on a schematic canvas, size every transistor, and see it simulated in your browser with ngspice and the SkyWater SKY130 models. Every transistor lights up green, gold or red by operating region as you move the sliders.
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