PROBLEM 007 · Beginner · The common-source stage
Common Sense
Common-source amplifier
The problem
Build a common-source amplifier: an NMOS with its source at ground, its gate driven by the input, and a resistor from VDD to its drain as the load. The output is the drain.
You choose the transistor size, the load resistor and the DC level of the input. Biasing is the real task: the gate needs enough voltage to conduct strongly, but not so much that the drain collapses into triode.
The test bench
- Supply: VDD = 1.8 V.
- The test bench hangs a 200 fF load capacitor on the net named “out”.
- It applies the AC stimulus to the input source named “in”; you set that source’s DC level.
Numbers to hit
- Voltage gain at least 12 dB
- Bandwidth (−3 dB) at least 30 MHz
- Output DC level between 0.6 V and 1.4 V
- Power at most 150 µW
- Every transistor in saturation
Design it yourself
Draw the circuit on a schematic canvas, size every transistor, and see it simulated in your browser with ngspice and the SkyWater SKY130 models. Every transistor lights up green, gold or red by operating region as you move the sliders.
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- Diode TaxReplace the load resistor with a transistor and see how gain becomes a ratio of sizes.
- Mid-Rail RebelAn NMOS and a PMOS driven together make a high-gain stage, if you can bias it.
- Follow the LeaderA buffer with gain just under one: bias it so it is fast and stays in saturation.
- Gate KeeperDrive the source instead of the gate: a non-inverting stage with a low input resistance.
- Stack AttackStack a second transistor on top to multiply the output resistance, then use it with a big load.
- DegenerateA resistor in the source trades gain for a gain that no longer depends on the transistor.