PROBLEM 021 · Easy · The PMOS current mirror
Mirror, Mirror
PMOS current mirror
The problem
Build a 1 : 1 current mirror from two PMOS transistors, both with their sources on VDD and their gates joined. One is diode-connected (its gate on its own drain) and carries a 50 µA reference current drawn to ground by a Current source. The other delivers the copy into the net “out”.
It is the upside-down twin of the NMOS mirror: it pushes current out of VDD into the load rather than pulling it out of the load. The output must stay low enough for the copy to remain saturated, so now the limit is at the top: how high can “out” go before the current falls?
The test bench
- Supply: VDD = 1.8 V.
- Your reference is the Current source you place: set it to 50 µA (arrow pointing down, from the diode’s drain to ground).
- The test bench holds the net named “out” at 0.9 V with a voltage source, sweeps it from 0.1 V to 1.7 V, and measures the current your mirror exchanges with it.
Numbers to hit
- Output current at 0.9 V between 48 µA and 52 µA
- Change between 0.5 V and 1.3 V at most 3 %
- Output stays within 2% up to at least 1.3 V
- Every transistor in saturation
Design it yourself
Draw the circuit on a schematic canvas, size every transistor, and see it simulated in your browser with ngspice and the SkyWater SKY130 models. Every transistor lights up green, gold or red by operating region as you move the sliders.
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- Copy PasteCopy a 50 µA reference into a 100 µA output and keep it accurate as the output voltage moves.
- Copy Paste ProStack a second pair of transistors so the copy barely notices the output voltage.
- Double VisionOne reference, several copies: scale each copy by its width.
- Ten to OneA resistor in one source makes the copy much smaller than the reference, and its output resistance much higher.
- WilsonThree transistors and one feedback loop give a cascode’s output resistance without a bias voltage.
- Resistor ArmorEqual resistors in both sources make the mirror less sensitive to mismatch and to the output voltage.