PROBLEM 003 · Beginner · The PMOS transistor
Upside Down
Bias a PMOS for 50 µA
The problem
Connect one PMOS with its source on VDD, its drain on ground and its gate driven by an Input source named “in”. The current flows from VDD, through the transistor, to ground.
Everything about an NMOS is mirrored: the transistor is on when the gate is below the source by more than |Vth|, so the overdrive is VDD − Vgate − |Vth|. Hole mobility is lower than electron mobility, so for the same current a PMOS has to be about two to three times wider.
The test bench
- Supply: VDD = 1.8 V.
- The test bench reads the supply current and sweeps the source named “in” from 0 V to 1.8 V.
Numbers to hit
- Drain current between 47.5 µA and 52.5 µA
- Efficiency gm/Id at least 11 1/V
- Every transistor in saturation
Design it yourself
Draw the circuit on a schematic canvas, size every transistor, and see it simulated in your browser with ngspice and the SkyWater SKY130 models. Every transistor lights up green, gold or red by operating region as you move the sliders.
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